The present invention relates to circuitry for compressing the amplitude of analog signals, and, more particularly, to a novel circuit which will perform any desired nonlinear and monotonic compression function symmetrically on both polarities of an input AC signal.
Many analog-to-digital conversion systems require that a system dynamic range be provided which is larger than the dynamic range which can be provided by the analog-to-digital converter (ADC) available for use in that system. For example, it may be desirable to provide a high-frequency analog-to-digital conversion system which has 11 bit resolution, but which, for speed considerations and the like, must use an 8-bit flash converter The three bit difference between the ADC resolution and the desired system resolution can be achieved by causing the input alternating-current signal to undergo a symmetrical nonlinear compression function prior to analog-to-digital conversion, and then following the ADC with a digital decompression circuit, utilizing a look-up table and the like means, as well known to the art. It is highly desirable to provide a symmetrical non-linear, but monotonic, compression function circuit, especially a circuit capable of integration in a hybrid or monolithic integrated circuit, while increasing the low level resolution and dynamic range of the following ADC means.